MECVE105-4 Electronics System Design M.Tech Model Question Paper : mgu.ac.in

Name of the College : Mahatma Gandhi University
Department : Communication Engineering
Subject Code/Name : MECVE 105-4/Electronics System Design
Sem : I
Website : mgu.ac.in
Document Type : Model Question Paper

Download Model/Sample Question Paper : https://www.pdfquestion.in/uploads/mgu.ac.in/5064-MECVE%20105_4%20Electronics%20System%20Design.doc

Electronics System Design Question Paper :

M. TECH Degree Examination :
Model Question Paper
Branch: Electronics &Communication Engg

Related : MGU MECVE103 CMOS Digital Design I M.Tech Model Question Paper : www.pdfquestion.in/5063.html

Specialization: VLSI & Embedded Systems
First Semester
MECVE 105-4 Electronics System Design
(Regular-2013 Admissions)
Time: 3 hrs.
Maximum marks: 100
Answer all questions :
Each question carries 25 marks. :
I a). Explain Boundary Scan testing? (5)
b). Briefly explain the types of files generated on cross compilation (8)
c). What are the different phases of EDLC? (12)
OR

II. a). Distinguish between simulator and emulator (5)
b). What are the major considerations while designing a power supply (8)
c). Explain the various approaches used in modeling EDLC? (12)

III a). Briefly explain what is noise path and noise coupling. (5)
b). Explain Conducted and radiated emission in terms of FCC regulations. (8)
c). Analyse the effect of inductive, capacitive and magnetic coupling on electronic system. (12)
OR

IV a). How does the magnitude of the magnetic field vary versus distance from i) a single isolated conductor? ii) closely spaced parallel conductors carrying the signal and return current? (5)
b). What is the importance of shield termination? What are the different termination methods? (8)

c). A receptor circuit consists of a 1-m long wire, located 5 cm above a ground plane. Each end of the circuit is terminated with a 50-O resistor. An electric field induces a noise current of 0.5 mA into the circuit. The magnetic field from the same noise source induces a noise voltage of 25 mV into the circuit.

i) If the noise voltage is measured across each of the terminating resistors, what will the two readings be?
ii) What general conclusion can you draw from the above results?
iii) What will happen if the polarity of the magnetic-field induced voltage is reversed? (12)

V a). What you mean by signal ground? What are the different categories of signal grounds? (5)
b). Calculate the skin depth and absorption loss for a brass shield 0.062 inch thick at following frequencies (a) 0.1 KHz (b) 1 KHz (c) 10KHz (d) 100 KHz (8)
c). Explain the low frequency and high frequency analysis of common mode choke? (12)
OR

VI a). Explain near field and far field (5)
b). Analyze the eeefects of ground loops in an electronic system. Show how the effects can be mitigated (8)
c). find the reflection loss of a copper shield to a 1000Hz plane wave, if the copper thickness are i) 0.001inch ii) 0.01inch .

iii)A gasketed joint has a measured transfer impedance of 10m?. What will be the shielding effectiveness of the joint be to an incident plane wave? (12)

VII a). Explain the Human Body Model (HBM) For Electrostatic Discharge? (5)
b). What is the necessity of power line filters in SMPS? Explain briefly (8)

c. A product in a plastic enclosure uses diode clamps to the power supply to protect the input from ESD damage. The circuit has a Vcc-to-ground capacitance of 0.5 mF. An ESD event dumps a 20-A current for a period of 100 ns into the power-ground bus (assume that the current is a square wave).

i). What will be the change in the Vcc-to-ground voltage?
ii) If an additional 10 mF of capacitance is added between Vcc and ground, what will be the change in the Vcc -to-ground voltage? (12)
OR

VIII a. What are the three general categories where Software ESD hardening should be provided to detect errors? (5)
b. Explain about transient and surge protection devices (8)

c. Consider fig a and fig b and both are 12 layer PCB stack up, and how many design objectives will satisfy these two stack ups ? Draw another 12 layer stack up which will satisfy maximum no of design objectives. (12)