EC1401 VLSI Design B.E Question Bank : niceindia.com
Name of the College : Noorul Islam College of Engineering
University : Anna University
Degree : B.E
Department : Electronics and Communication Engineering
Subject Code/Name : EC 1401 – VLSI Design
Document Type : Question Bank
Website : niceindia.com
Download :https://www.pdfquestion.in/uploads/ni…LSI_DESIGN.pdf
NICE VLSI Design Question Paper
1.What are four generations of Integration Circuits? :
** SSI (Small Scale Integration)
** MSI (Medium Scale Integration)
** LSI (Large Scale Integration)
** VLSI (Very Large Scale Integration)
Related : Dasari Jhansi Rani Institute Of Engineering And Technology EC1201 Electron Devices B.E Question Bank : www.pdfquestion.in/2963.html
2.Give the advantages of IC? :
** Size is less
** High Speed
** Less Power Dissipation
3.Give the variety of Integrated Circuits? :
** More Specialized Circuits
** Application Specific Integrated Circuits(ASICs)
** Systems-On-Chips
4.Give the basic process for IC fabrication
** Silicon wafer Preparation
** Epitaxial Growth
** Oxidation
** Photolithography
** Diffusion
** Ion Implantation
** Isolation technique
** Metallization
** Assembly processing & Packaging
5.What are the various Silicon wafer Preparation? :
** Crystal growth & doping
** Ingot trimming & grinding
** Ingot slicing
** Wafer polishing & etching
** Wafer cleaning.
6.Different types of oxidation? :
Dry & Wet Oxidation
7.What is the transistors CMOS technology provides? :
n-type transistors & p-type transistors.
8.What are the different layers in MOS transistors? :
Drain , Source & Gate
9.What is Enhancement mode transistor? :
The device that is normally cut-off with zero gate bias.
10. What is Depletion mode Device? :
The Device that conduct with zero gate bias.
11.When the channel is said to be pinched –off? :
If a large Vds is applied this voltage with deplete the Inversion layer .This Voltage effectively pinches off the channel near the drain.
12.Give the different types of CMOS process? :
** p-well process
** n-well process
** Silicon-On-Insulator Process
** Twin- tub Process
13.What are the steps involved in twin-tub process? :
** Tub Formation
** Thin-oxide Construction
** Source & Drain Implantation
** Contact cut definition
** Metallization.
14.What are the advantages of Silicon-on-Insulator process? :
** No Latch-up
** Due to absence of bulks transistor structures are denser than bulk silicon.
15.What is BiCMOS Technology? :
It is the combination of Bipolar technology & CMOS technology.
16.What are the basic processing steps involved in BiCMOS process? :
Additional masks defining P base region
** N Collector area
** Buried Sub collector (SCCD)
** Processing steps in CMOS process
17.What are the advantages of CMOS process? :
**Low power Dissipation
**High Packing density
**Bi directional capability
18.What are the advantages of CMOS process? :
Low Input Impedance
Low delay Sensitivity to load.
19.What is the fundamental goal in Device modeling? :
To obtain the functional relationship among the terminal electrical variables of the device that is to be modeled.
20.Define Short Channel devices? :
Transistors with Channel length less than 3- 5 microns are termed as Short channel devices. With short channel devices the ratio between the lateral & vertical dimensions are reduced.
21.What is pull down device? :
A device connected so as to pull the output voltage to the lower supply voltage usually 0V is called pull down device.
22.What is pull up device? :
A device connected so as to pull the output voltage to the upper supply voltage usually
VDD is called pull up device.
23. Why NMOS technology is preferred more than PMOS technology? :
N- channel transistors has greater switching speed when compared tp PMOS transistors.
24. What are the different operating regions foe an MOS transistor? :
** Cutoff region
** Non- Saturated Region
** Saturated Region
25. What are the different MOS layers? :
** n-diffusion
** p-diffusion
** Polysilicon
** Metal