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Low Power Cmos VLSI Design M.Tech Question Paper : vardhaman.org

College : Vardhaman College Of Engineering
Degree : M.Tech
Semester : II
Department : Electronics & Communication Engineering
Subject :Low Power CMOS VLSI Design
Document type : Question Paper
Website : vardhaman.org

Download Previous / Old Question Papers :
Jan– 2014 : https://www.pdfquestion.in/uploads/vardhaman.org/6455-MT2SJAN-14.pdf
September 2012 : :https://www.pdfquestion.in/uploads/vardhaman.org/6455-question%20papers%20of%20two%20year%20m.%20tech%20ii%20semester%20regular%20examinations%20september%20-%202012.pdf

Vardhaman VLSI Design Question Paper

Two Year M. Tech II Semester Regular Examinations September – 2012
(Regulations: VCE-R11)
(Digital Electronics and Communication Systems)
Time: 3 hours
Max Marks: 60
Answer any FIVE Questions.
All Questions carry equal marks

Related : Vardhaman College Of Engineering Optical Networks M.Tech Question Paper : www.pdfquestion.in/6450.html

1 a) Explain different sources of power dissipation in digital CMOS circuit 6M
b) Explain
i. Sub threshold Swing
ii. Effects of short channel length 6M

2 a) If y = x1x2x3 + x1 x2x3 + x1x2 x3 , Determine a(y). 8M
b) Express 2 0 2 0 2 0 ( ), ( ) ( ) T T T T T P x x x P x x x andP x x in terms of probabilities ( ) X P P and normalized activities ( ) X a a . 4M

3 Explain :
i. Average power estimation in combinational circuits
ii. Average power estimation in sequential circuits. 12M

4 a) Explain the algorithmic level transforms for low power 6M
b) With appropriate example, explain the drawback of power reduction using parallelism. 6M

5 Explain :
i. Technology mapping
ii. Transistor sizing 12M

6 Draw and explain the operation of 4T SRAM cell and 6T SRAM cell 12M
7 a) Explain different precharge techniques employed by SRAM’s 6M
b) With a neat diagram, explain the operation of differential sense amplifier. 6M

8 Explain :
i. Instruction level power analysis
ii. Voltage island

July – 2014

M. Tech II Semester Regular Examinations
LOW POWER CMOS VLSI DESIGN
(Digital Electronics and Communications Systems)
Date: 11 July, 2014
Time: 3 hours
Max Marks: 60
Answer any Five Questions.
All Questions carries equal marks.
1. a) Explain different sources of power dissipation in digital CMOS circuit. 6M
b) Explain the following:
i. Sub Threshold Swing
ii. Effects of short channel length 6M

2. a) Explain briefly how signal probability is calculated using BDD. 6M
b) How switching activity in sequential circuits is calculated? Explain briefly. 6M
3. Explain Monte-Carlo based technique for estimating the average power in sequential circuits. 12M

4. a) Explain the algorithmic level transforms for low power. 6M
b) With appropriate example, explain the drawback of power reduction using parallelism. 6M
5. Explain the algorithm for power dissipation driven multilevel logic optimization with an example. 12M

6. With neat figures and waveforms for read and write, explain the operation of 4T and 6T SRAM cell. 12M
7. a) Explain different precharge techniques employed by SRAM’s. 6M
b) With a neat diagram, explain the operation of differential sense amplifier. 6M

8. Explain the following:
i. Instruction level power analysis
ii. Voltage Island 12M

February – 2014

Power Electronic Converters-II :
(Power Electronics and Electric Drives)
Date : 04
Time : 3 Hours
Max. Marks : 60
Answer any FIVE Questions.
All Questions carry equal marks

All parts of the question must be answered in one place only
1. a) With neat cross sectional view of half cell, explain turn-on and turn-off processes of static induction thyristor (SITH), along with its equivalent circuit. 6M
b) Compare features of MTO, ETO and MCT with respect to their gate control, switching frequency, on-state voltage. 6M

2. a) What are the advantages and disadvantages of resonant inverters with bi-directional switches? 6M
b) Discuss about the methods for voltage control of series resonant inverters. 6M

3. a) With a neat circuit diagram and valid mathematical equations, discuss about parallel resonant inverters. 6M
b) With a neat circuit diagram and waveforms, explain the circuit operation of Class E resonant rectifier. 6M

4. a) With a neat circuit diagram, equivalent circuits and relevant waveforms, explain the operation of L-type ZCS resonant converter. 6M
b) With a neat circuit diagram, relevant waveform and valid equations explain the operation of resonant DC link inverter. 6M

5. a) Discuss in detail about the special features of diode-clamped multilevel inverters. 6M
b) With a neat circuit diagram, explain the operation of flying capacitor type multi-level inverter. 6M

6. a) Discuss in detail about the reactive power compensation of a 1-Phase multi-level converter. 6M
b) With a neat circuit diagram, explain the operation of a push-pull converter.6M
7. a) Discuss in brief about switched mode AC Power Supplies. 6M
b) Discuss brief about resonant DC power supply. 6M

8. Write short notes on:
i. Double ended flyback converter
ii. Multistage conversion
iii. Emitter turn-off thyristors 12M

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